Mismatch is a leading cause of yield loss and a determining factor of circuit performance in analog, mixed-signal (AMS) ICs. A new method of modeling mismatch that accounts for variations in physical process parameters and is accurate over geometry and bias has been developed. However, as with prior mismatch models, the use of this new mismatch model required intensive manual calculations thus making it non-user friendly. Therefore, the application of the new mismatch methodology, or model, has been combined with computer programming and electronic circuit simulation and modeling resulting in a mismatch tool. Thus, users of the mismatch tool, such as designers and other engineering professionals, can create more robust designs by quickly evaluating the mismatch opportunity in a fraction of the time that the manual calculations required and with more accuracy. The mismatch tool further allows the designer to simulate a variety of bias and geometry conditions in a matter of seconds, including providing batch-mode capability to perform multiple sweeps over bias and geometry to aid in finding a desired configuration.